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HT95R64 Datasheet(PDF) 51 Page - Holtek Semiconductor Inc |
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HT95R64 Datasheet(HTML) 51 Page - Holtek Semiconductor Inc |
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51 / 82 page ![]() HT95R64/HT95R65 Rev. 1.00 51 March 3, 2010 The Sleep Mode or Idle Mode is initialised by a HALT instruction and results in the following. · The system clock will be turned off. · The WDT function will be disabled if the WDT clock source is the instruction clock. · The WDT function will be disabled if the WDT clock source is the 32768Hz oscillator in the Idle mode. · The WDT will still function if the WDT clock source is the WDT internal oscillator. · If the WDT function is still enabled, the WDT counter and WDT prescaler will be cleared and resume counting. · The contents of the on chip Data Memory and registers remain unchanged. · All the I/O ports maintain their original status. · The PDF flag is set and the TO flag is cleared by hardware. SCOM Function for LCD The devices have the capability of driving external LCD panels. The common pins for LCD driving, SCOM0~ SCOM3, are pin shared with certain pin on the PD0~ PD3 port. The LCD signals (COM and SEG) are gener- ated using the application program. LCD Operation An external LCD panel can be driven using this device by configuring the PD0~PD3 pins as common pins and using other output ports lines as segment pins. The LCD driver function is controlled using the SCOMC register which in addition to controlling the overall on/off function also controls the bias voltage setup function. This en- ables the LCD COM driver to generate the necessary VDD/2 voltage levels for LCD 1/2 bias operation. The SCOMEN bit in the SCOMC register is the overall master control for the LCD Driver, however this bit is used in conjunction with the COMnEN bits to select which Port D pins are used for LCD driving. Note that the Port Control register does not need to first setup the pins as outputs to enable the LCD driver operation. SCOMEN COMnEN Pin Function O/P Level 0 X I/O 0or1 1 0 I/O 0or1 1 1 SCOMN VDD/2 Output Control LCD Bias Control The LCD COM driver enables a range of selections to be provided to suit the requirement of the LCD panel which is being used. The bias resistor choice is imple- mented using the ISEL1 and ISEL0 bits in the SCOMC register. S C O M C R e g i s t e r b 7 b 0 C O M 0 E N P D 0 o r S C O M 0 s e l e c t i o n 0 : G P I O 1 : S C O M 3 P D 1 o r S C O M 1 s e l e c t i o n 0 : G P I O 1 : S C O M 3 P D 2 o r S C O M 2 s e l e c t i o n 0 : G P I O 1 : S C O M 3 P D 3 o r S C O M 3 s e l e c t i o n 0 : G P I O 1 : S C O M 3 S C O M m o d u l e o n / o f f c o n t r o l 0 : d i s a b l e 1 : e n a b l e S C O M n c a n b e e n a b l e b y C O M n E N i f S C O M E N = 1 S C O M o p e r a t i n g c u r r e n t s e l e c t i o n ( V D D = 5 V ) I S E L 1 , I S E L 0 : 0 0 : 2 5 m A 0 1 : 5 0 m A 1 0 : 1 0 0 m A 1 1 : 2 0 0 m A R e s e r v e d B i t 1 : U n p r e d i c t a b l e o p e r a t i o n - b i t m u s t N O T b e s e t h i g h 0 : C o r r e c t l e v e l - b i t m u s t b e r e s e t t o z e r o f o r c o r r e c t o p e r a t i o n C O M 1 E N C O M 2 E N C O M 3 E N S C O M E N I S E L 0 I S E L 1 SCOMC Register V D D S C O M 0 ~ S C O M 3 S C O M E N C O M n E N V D D / 2 S C O M o p e r a t i n g c u r r e n t LCD COM Bias |
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