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X20C04DM Datasheet(PDF) 2 Page - Xicor Inc.

Part # X20C04DM
Description  Nonvolatile Static RAM
PDF  15 Pages
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Manufacturer  XICOR [Xicor Inc.]
Direct Link  http://www.xicor.com
Logo XICOR - Xicor Inc.

X20C04DM Datasheet(HTML) 2 Page - Xicor Inc.

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X20C04
2
PIN DESCRIPTIONS
Addresses (A0–A8)
The Address inputs select an 8-bit memory location
during a read or write operation.
Chip Enable (
CE)
The Chip Enable input must be LOW to enable all read/
write operations. When
CE is HIGH, power consumption
is reduced.
Output Enable (
OE)
The Output Enable input controls the data output buffers
and is used to initiate read and recall operations. Output
Enable LOW disables a store operation regardless of
the state of
CE, WE, or NE.
Data In/Data Out (I/O0–I/O7)
Data is written to or read from the X20C04 through the
I/O pins. The I/O pins are placed in the high impedance
state when either
CE or OE is HIGH or when NE is LOW.
Write Enable (
WE)
The Write Enable input controls the writing of data to
both the static RAM and stores to the E2PROM.
Nonvolatile Enable (
NE)
The Nonvolatile Enable input controls all accesses to
the E2PROM array (store and recall functions).
PIN NAMES
Symbol
Description
A0–A8
Address Inputs
I/O0–I/O7
Data Input/Output
WE
Write Enable
CE
Chip Enable
OE
Output Enable
NE
Nonvolatile Enable
VCC
+5V
VSS
Ground
NC
No Connect
3825 PGM T01
VCC SENSE
ROW
SELECT
CONTROL
LOGIC
COLUMN
SELECT
&
I/OS
EEPROM ARRAY
512 x 8
SRAM
ARRAY
CE
OE
WE
NE
A3–A6
I/O0–I/O7
A0–A2
A7–A8
3825 FHD F01
FUNCTIONAL DIAGRAM



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