X24645PI datasheet(10/18 Pages) XICOR

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X24645

Block Protect Bits

The Block Protect Bits BP0 and BP1 determine which

blocks of the memory are write-protected:

Programmable Hardware Write Protect

The Write Protect (WP) pin and the Write Protect

Enable (WPEN) bit in the Write Protect Register

control the programmable hardware write protect

feature. Hardware write protection is enabled when the

WP pin is HIGH and the WPEN bit is “1”, and disabled

when either the WP pin is LOW or the WPEN bit is “0”.

When the chip is hardware write-protected, nonvolatile

writes are disabled to the Write Protect Register,

including the BP bits and the WPEN bit itself, as well

as to block-protected sections in the memory array.

Only the sections of the memory array that are not

block-protected can be written. Note that since the

WPEN bit is write-protected, it cannot be changed

back to a LOW state, and write protection is disabled

as long as the the WP pin is held HIGH. Table 2

deﬁnes the write protection status for each state of

WPEN and WP.

Table 1. Block Protect Bits

2783 FRM T02

BP1

BP0

Protected

Addresses

None

1800h–1FFFh

Upper 1/4

1000h–1FFFh

Upper 1/2

0000h–1FFFh

Full Array (WPR

not included)

Table 2. Write Protect Status Table

2783 FRM T03.1

WPEN

Memory Array

(Not Block

Protected)

Memory Array

(Block Protected)

BP Bits

WPEN Bit

Writable

Protected

Writable

Protected

Writable

Protected

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