SS6804BCSTR datasheet(7/12 Pages) SSC

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SS6804

BLOCK DIAGRAM

Battery

Voltage

Sense

Circuit

450

400

350

300

VC2

VC1

VCC

UD4

UD3

UD2

VC3

UD1

GND

Wake-Up Control

VCC-1V

VCC-0.3V

VCC-0.15V

VCC+0.4V

Power-Down

Control

1.2V

Overcharge Delay

Circuit

Overcurrent Delay

Circuit

Overdischarge Delay

Circuit

PIN DESCRIPTIONS

PIN 1: NSL-

Input

for

cell

number

selection. Connect this pin to

VCC for three-cell application

and

GND

for

four-cell

application.

PIN 2: OC-

NMOS open drain output for

control of the charge control

MOSFET M2. When overcharge

occurs, this pin sinks current to

switch the external PNP Q1 on,

and charging is inhibited by

turning off the charge control

MOSFET M2.

PIN 3: CS-

Input pin for current sensing.

Using the drain-source voltage of

the discharge control MOSFET

M1 (voltage between VCC and

CS), it senses the discharge

current

during normal mode

and

detects whether charging

current

present

during

power-down mode.

PIN 4: OD -

Output

for

control

discharge control MOSFET M1.

When overdischarge occurs, this

pin goes high to turn off the

discharge control MOSFET M1

and discharging is inhibited.

PIN 5: TD-

Overdischarge delay time setting

pin.

PIN 6: TI -

Overcurrent delay time setting

pin.

PIN 7: TC -

Overcharge delay time setting

pin.

PIN 8: GND -

Ground pin. This pin is to be

connected

the

negative

terminal of the battery cell BAT4.

PIN 9: UD4-

This pin is to be connected to the

positive terminal of the battery

cell

BAT4

for

cell-balancing

bleeding

function

under

overcharge condition.

12/29/2003 Rev.2.02

SS6804BCSTR Datasheet(PDF) 7 Page - Silicon Standard Corp.

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