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HAL740 Datasheet(PDF) 6 Page - Micronas |
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HAL740 Datasheet(HTML) 6 Page - Micronas |
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6 / 22 page ![]() HAL700, HAL740 DATA SHEET 6 Nov. 30, 2009; DSH000029_002EN Micronas 2. Functional Description The HAL 700 and the HAL 740 are monolithic inte- grated circuits with two independent subblocks each consisting of a Hall plate and the corresponding com- parator. Each subblock independently switches the comparator output in response to the magnetic field at the location of the corresponding sensitive area. If a magnetic field with flux lines perpendicular to the sen- sitive area is present, the biased Hall plate generates a Hall voltage proportional to this field. The Hall voltage is compared with the actual threshold level in the com- parator. The subblocks are designed to have closely matched switching points. The output of comparator 1 attached to S1 controls the open drain output at Pin 3. Pin 2 is set according to the state of comparator 2 con- nected to S2. The temperature-dependent bias – common to both subblocks – increases the supply voltage of the Hall plates and adjusts the switching points to the decreas- ing induction of magnets at higher temperatures. If the magnetic field exceeds the threshold levels, the com- parator switches to the appropriate state. The built-in hysteresis prevents oscillations of the outputs. The magnetic offset caused by mechanical stress is compensated for by use of “switching offset compen- sation techniques”. Therefore, an internal oscillator provides a two-phase clock to both subblocks. For each subblock, the Hall voltage is sampled at the end of the first phase. At the end of the second phase, both sampled and actual Hall voltages are averaged and compared with the actual switching point. Shunt protection devices clamp voltage peaks at the output pins and VDD-pin together with external series resistors. Reverse current is limited at the VDD-pin by an internal series resistor up to −15 V. No external reverse protection diode is needed at the VDD-pin for reverse voltages ranging from 0 V to −15 V. Fig. 2–2 and Fig. 2–3 on page 7 show how the output signals are generated by the HAL700 and the HAL740. The magnetic flux density at the locations of the two Hall plates is shown by the two sinusodial curves at the top of each diagram. The magnetic switching points are depicted as dashed lines for each Hall plate separately. Fig. 2–1: HAL700 timing diagram with respect to the clock phase t Clock t BS1 t BS2 t Pin 2 t Pin 3 t IDD BS1on BS2on VOH VOL VOH VOL 1/fosc tf tf |
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