74LVC2G02GD datasheet(6/16 Pages) NXP

6 / 16 page

74LVC2G02_7

Product data sheet

Rev. 07 — 6 June 2008

6 of 16

NXP Semiconductors

74LVC2G02

Dual 2-input NOR gate

[1]

All typical values are measured at Tamb = 25 °C.

VOH

HIGH-level output voltage VI =VIH or VIL

IO = −100 µA; VCC = 1.65 V to 5.5 V

VCC − 0.1

IO = −4 mA; VCC = 1.65 V

0.95

IO = −8 mA; VCC = 2.3 V

1.7

IO = −12 mA; VCC = 2.7 V

1.9

IO = −24 mA; VCC = 3.0 V

2.0

IO = −32 mA; VCC = 4.5 V

3.4

VOL

LOW-level output voltage

VI = VIH or VIL

IO = 100 µA; VCC = 1.65 V to 5.5 V

0.1

IO = 4 mA; VCC = 1.65 V

0.70

IO = 8 mA; VCC = 2.3 V

0.45

IO = 12 mA; VCC = 2.7 V

0.60

IO = 24 mA; VCC = 3.0 V

0.80

IO = 32 mA; VCC = 4.5 V

0.80

input leakage current

VI = 5.5 V or GND; VCC = 0 V to 5.5 V

±20

µA

IOFF

power-off leakage current VI or VO = 5.5 V; VCC = 0 V

±20

µA

ICC

supply current

VI = 5.5 V or GND;

VCC = 1.65 V to 5.5 V; IO =0A

µA

∆ICC

additional supply current

per pin; VI = VCC − 0.6 V; IO = 0 A;

VCC = 2.3 V to 5.5 V

5000

µA

Table 7.

Static characteristics …continued

At recommended operating conditions; voltages are referenced to GND (ground = 0 V).

Symbol Parameter

Conditions

Min

Typ

Max

Unit

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