ADC1613D datasheet(21/43 Pages) NXP

Part #	ADC1613D

Description	Dual 16-bit ADC; 65 Msps, 80 Msps, 105 Msps or 125 Msps; serial JESD204A interface

PDF	43 Pages

Scroll/Zoom	100%

Manufacturer	NXP [NXP Semiconductors]

Direct Link	http://www.nxp.com

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21 / 43 page

ADC1613D_SER_2

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Preliminary data sheet

Rev. 02 — 23 April 2010

21 of 43

NXP Semiconductors

ADC1613D series

ADC1613D series; serial JESD204A interface

13.3.2 Equivalent input circuit

The equivalent circuit of the input clock buffer is shown in Figure 18. The common-mode

voltage of the differential input stage is set via internal resistors of 5 k

Ω resistors.

Single-ended or differential clock inputs can be selected via the SPI (see Table 20). If

single-ended is selected, the input pin (CLKM or CLKP) is selected via control bit

SE_SEL.

a. Sine clock input

b. Sine clock input (with transformer)

c. LVDS clock input

d. LVPECL clock input

Fig 17. Differential clock input

Sine

clock input

CLKP

CLKM

005aaa173

Sine

clock input

CLKP

CLKM

005aaa054

005aaa055

LVDS

clock input

CLKP

CLKM

LVPECL

clock input

005aaa172

CLKP

CLKM

Fig 18. Equivalent input circuit

CLKP

CLKM

005aaa081

5 k

Vcm(clk)

SE_SEL

Package

ESD

Parasitics

ADC1613D Datasheet(PDF) 21 Page - NXP Semiconductors

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