CS4222

DS236F1

21

4.6 Control Port Interface

The control port is used to load all the internal settings. The operation of the control port may be completely

asynchronous with the audio sample rate. However, to avoid potential interference problems, the control port

pins should remain static if no operation is required.

desired, AD0/CS should be tied to VD or DGND. If the CS4222 ever detects a negative transition on AD0/CS

after power-up, SPI mode will be selected.

4.6.1 SPI Mode

In SPI mode, CS is the CS4222 chip select signal, CCLK is the control port bit clock, CDIN is the input data

line from the microcontroller and the chip address is 0010000. All signals are inputs and data is clocked in

on the rising edge of CCLK.

Figure 11 shows the operation of the control port in SPI mode. To write to a register, bring CS low. The first

7 bits on CDIN form the chip address, and must be 0010000. The eighth bit is a read/write indicator (R/W),

which must be low to write. Register reading from the CS4222 is not supported in the SPI mode. The next

8 bits form the Memory Address Pointer (MAP), which is set to the address of the register that is to be up-

dated. The next 8 bits are the data which will be placed into a register designated by the MAP.

The CS4222 has a MAP auto increment capability, enabled by the INCR bit in the MAP register. If INCR is

a zero, then the MAP will stay constant for successive writes. If INCR is set to a 1, then MAP will auto incre-

ment after each byte is written, allowing block writes of successive registers. Register reading from the

CS4222 is not supported in the SPI mode.

00000000

00000000

00000000

00000000

CS

CCLK

CDIN

CHIP

ADDRESS

0010000

R/W

MAP

DATA

MSB

LSB

byte 1

byte n

MAP = Memory Address Pointer

Figure 11. Control Port Timing, SPI mode