www.ti.com

1

2

3

1

0

0

0

1

0

0

0

0

0

0

0

0

0

0

0

1

1

1

0

CLK

OE(ED2)

LE(ED1)

SDO

Data source of

shift register

Error Detection

SDI

SDI

Error Status Code

Bit 7

Bit 6

Bit 5

Bit 4

>2 µs

1

2

3

0

4

5

6

7

1

0

CLK

OE(ED2)

LE(ED1)

SDI

8-Bit Configuration Code

Bit 7 Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

TLC5916, TLC5917

8-BIT CONSTANT-CURRENT LED SINK DRIVERS

SLVS695A – JUNE 2007 – REVISED MARCH 2008

Reading Error Status Code in Special Mode

When OE(ED2) is pulled low while in Special Mode, error detection and load error status codes are loaded into

the Shift Register, in addition to enabling output ports to sink current. Figure 16 shows the timing sequence for

error detection. The 0 and 1 signal levels are sampled at the rising edge of each CLK. At least three zeros must

be sampled at the voltage low signal OE(ED2). Immediately after the second zero is sampled, the data input

source of the Shift Register changes to the 8-bit parallel Error Status Code register, instead of from the serial

data on SDI. Normally, the error status codes are generated at least 2

µs after the falling edge of OE(ED2). The

occurrence of the third or later zero saves the detected error status codes into the Shift Register. Therefore,

when OE(ED2) is low, the serial data cannot be shifted into TLC5916/TLC5917 via SDI. When OE(ED2) is pulled

high, the data input source of the Shift Register is changed back to SDI. At the same time, the output ports are

disabled and the error detection is completed. Then, the error status codes saved in the Shift Register can be

shifted out via SDO bit by bit along with CLK, as well as the new serial data can be shifted into

TLC5916/TLC5917 via SDI.

While in Special Mode, the TLC5916/TLC5917 cannot simultaneously transfer serial data and detect LED load

error status.

Figure 16. Reading Error Status Code

Writing Configuration Code in Special Mode

When in Special Mode, the active high signal LE(ED1) latches the serial data in the Shift Register to the

Configuration Latch, instead of the Output Latch. The latched serial data is used as the Configuration Code.

The code is stored until power off or the Configuration Latch is rewritten. As shown in Figure 17, the timing for

writing the Configuration Code is the same as the timing in the Normal Mode to latching output channel data.

Both the Configuration Code and Error Status Code are transferred in the common 8-bit Shift Register. Users

must pay attention to the sequence of error detection and current adjustment to avoid the Configuration Code

being overwritten by Error Status Code.

Figure 17. Writing Configuration Code

Copyright © 2007–2008, Texas Instruments Incorporated

Submit Documentation Feedback

19

Product Folder Link(s): TLC5916 TLC5917