TUSB3410 datasheet(11/26 Pages) TI

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+ VIN*VOUT @ IOUT

TPS735xx

www.ti.com

SBVS087H – JUNE 2008 – REVISED NOVEMBER 2009

Thermal Information

Thermal Protection

Power Dissipation

Thermal protection disables the output when the

The ability to remove heat from the die is different for

junction temperature rises to approximately +165°C,

each

package

type,

presenting

different

allowing the device to cool. When the junction

considerations in the PCB layout. The PCB area

temperature cools to approximately +145°C the

around the device that is free of other components

output circuitry is again enabled. Depending on power

moves the heat from the device to the ambient air.

dissipation,

thermal

resistance,

and

ambient

Performance data for JEDEC low- and high-K boards

temperature, the thermal protection circuit may cycle

are given in the Dissipation Ratings table. Using

on and off. This cycling limits the dissipation of the

heavier

copper

increases

the

effectiveness

regulator, protecting it from damage as a result of

removing heat from the device. The addition of plated

overheating.

through-holes

heat-dissipating

layers

also

improves the heatsink effectiveness.

Any tendency to activate the thermal protection circuit

indicates

excessive

power

dissipation

Power dissipation depends on input voltage and load

inadequate heatsink. For reliable operation, junction

conditions. Power dissipation is equal to the product

temperature should be limited to +125°C maximum.

of the output current time the voltage drop across the

To estimate the margin of safety in a complete design

output pass element, as shown in Equation 2:

(including

heatsink),

increase

the

ambient

(2)

temperature until the thermal protection is triggered;

use worst-case loads and signal conditions. For good

Note: When the device is used in a condition of

reliability, thermal protection should trigger at least

higher input and lower output voltages with the DRV

+35°C

above

the

maximum

expected

ambient

and DRB packages, PD exceeds the package rating

condition

your

particular

application.

This

at room temperature. This equation shows an

configuration

produces

worst-case

junction

example of the DRB package:

temperature of +125°C at the highest expected

PD = (6.5V – 1.0V) × 500mA = 2.75W, which is

ambient temperature and worst-case load.

greater than 2.5W at +25°C.

The internal protection circuitry of the TPS735xx has

Package Mounting

been designed to protect against overload conditions.

It was not intended to replace proper heatsinking.

Solder

pad

footprint

recommendations

for

the

Continuously running the TPS735xx into thermal

TPS735xx are available from the Texas Instruments

shutdown degrades device reliability.

web site at www.ti.com.

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