BUJ100LR_1

© NXP B.V. 2009. All rights reserved.

Product data sheet

Rev. 01 — 12 August 2009

2 of 11

NXP Semiconductors

BUJ100LR

Silicon diffused power transistor

2.

Pinning information

3.

Ordering information

4.

Limiting values

Table 2.

Pinning information

Pin

Symbol

Description

Simplified outline

Graphic symbol

1B

base

SOT54

(TO-92)

2

C

collector

3

E

emitter

1

2

3

sym123

C

E

B

Table 3.

Ordering information

Type number

Package

Name

Description

Version

BUJ100LR

TO-92

plastic single-ended leaded (through hole) package; 3 leads

SOT54

Table 4.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

Max

Unit

collector-emitter peak

voltage

-

700

V

collector-base voltage

-

700

V

collector-emitter

voltage

-

400

V

collector current

DC; see Figure 1

-1

A

peak collector current

-

2

A

base current

-0.5

A

peak base current

-

1

A

total power dissipation

-2.1

W

storage temperature

-65

150

°C

junction temperature

-

150

°C

emitter-base voltage

-

9

V