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SBAS426D – AUGUST 2008 – REVISED MARCH 2010

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Updated Figure 56 .............................................................................................................................................................. 27

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Revised VREFCOM description in Internal Voltage Reference section ............................................................................. 29

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Changed fourth row entry of final output code column in Table 16 .................................................................................... 31

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Added ADC Power-Up section ........................................................................................................................................... 32

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Added Channel Cycling and Overload Recovery section ................................................................................................... 34

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Changed first three rows of hardware reset columns in Table 20 ...................................................................................... 35

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Revised Channel Multiplexing Example section ................................................................................................................. 55

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Revised Sleep Mode Example section ............................................................................................................................... 56

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