PCA8575_2

© NXP B.V. 2007. All rights reserved.

Product data sheet

Rev. 02 — 21 March 2007

7 of 30

NXP Semiconductors

PCA8575

8.

I/O programming

8.1 Quasi-bidirectional I/O architecture

The PCA8575’s 16 ports (see Figure 2) are entirely independent and can be used either

as input or output ports. Input data is transferred from the ports to the microcontroller in

the Read mode (see Figure 12). Output data is transmitted to the ports in the Write mode

(see Figure 11).

Every data transmission from the PCA8575 must consist of an even number of bytes, the

first byte will be referred to as P07 to P00, and the second byte as P17 to P10. The third

will be referred to as P07 to P00, and so on.

This quasi-bidirectional I/O can be used as an input or output without the use of a control

signal for data directions. At power-on the I/Os are HIGH. In this mode only a current

edges into heavily loaded outputs. These devices turn on when an output is written HIGH,

and are switched off by the negative edge of SCL. The I/Os should be HIGH before being

used as inputs. After power-on, as all the I/Os are set HIGH, all of them can be used as

inputs. Any change in setting of the I/Os as either inputs or outputs can be done with the

Write mode.

Remark: If a HIGH is applied to an I/O which has been written earlier to LOW, a large

8.2 Writing to the port (Output mode)

To write, the master (microcontroller) first addresses the slave device. By setting the last

bit of the byte containing the slave address to logic 0 the Write mode is entered. The

PCA8575 acknowledges and the master sends the first data byte for P07 to P00. After the

first data byte is acknowledged by the PCA8575, the second data byte P17 to P10 is sent

by the master. Once again, the PCA8575 acknowledges the receipt of the data. Each 8-bit

data is presented on the port lines after it has been acknowledged by the PCA8575.

The number of data bytes that can be sent successively is not limited. After every two

bytes, the previous data is overwritten.

The first data byte in every pair refers to Port 0 (P07 to P00), whereas the second data

byte in every pair refers to Port 1 (P17 to P10). See Figure 10.

Fig 10. Correlation between bits and ports

A

002aab634

06

05

04

03

02

01

00

first byte

07

P06 P05 P04 P03 P02 P01 P00

P07

A

16

15

14

13

12

11

10

second byte

17

P16 P15 P14 P13 P12 P11 P10

P17