PCA9500D datasheet(13/26 Pages) NXP

13 / 26 page

PCA9500_4

Product data sheet

Rev. 04 — 15 April 2009

13 of 26

NXP Semiconductors

PCA9500

8-bit I2C-bus and SMBus I/O port with 2-kbit EEPROM

10. Limiting values

GPIO device address conﬁgured as 0100 100x for this example.

EEPROM device address conﬁgured as 1010 100x for this example.

IO0, IO2, IO3 conﬁgured as outputs.

IO1, IO4, IO5 conﬁgured as inputs.

IO6, IO7 are not used and must be conﬁgured as outputs.

Fig 20. Typical application

PCA9500

IO0

IO1

SCL

SDA

VDD

MASTER

CONTROLLER

SCL

SDA

10 k

Ω

IO2

VDD

VSS

10 k

Ω

(optional)

SUB-SYSTEM 1

(e.g., temp sensor)

IO3

INT

SUB-SYSTEM 2

(e.g., counter)

RESET

controlled

switch

(e.g., CBT device)

VDD

enable

SUB-SYSTEM 3

(e.g., alarm system)

ALARM

IO4

IO5

VSS

IO6

IO7

2 k

Ω

10 k

Ω

002aae599

Table 4.

Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134).

Symbol

Parameter

Conditions

Min

Max

Unit

VDD

supply voltage

−0.5

+4.0

input voltage

VSS − 0.5

5.5

input current

−20

+20

output current

−25

+25

IDD

supply current

−100

+100

ISS

ground supply current

−100

+100

Ptot

total power dissipation

400

P/out

power dissipation per output

100

Tstg

storage temperature

−65

+150

°C

Tamb

ambient temperature

operating

−40

+85

°C

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