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PCF8562TT/2 Datasheet(PDF) 12 Page - NXP Semiconductors |
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PCF8562TT/2 Datasheet(HTML) 12 Page - NXP Semiconductors |
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12 / 36 page  PCF8562_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 18 March 2009 12 of 36 NXP Semiconductors PCF8562 Universal LCD driver for low multiplex rates 7.4.3 1:3 Multiplex drive mode When three backplanes are provided in the LCD, the 1:3 multiplex drive mode applies (see Figure 7). (1) Vstate1(t) = VSn(t) − VBP0(t). (2) Von(RMS) = 0.638VLCD. (3) Vstate2(t) = VSn+1(t) − VBP1(t). (4) Voff(RMS) = 0.333VLCD. Fig 7. Waveforms for the 1:3 multiplex drive mode with 1 ⁄ 3 bias mgl748 state 1 BP0 (b) Resultant waveforms at LCD segment. LCD segments state 2 BP1 state 1 state 2 (a) Waveforms at driver. BP2 S n S n+1 S n+2 Tfr VSS VLCD 2VLCD / 3 VLCD / 3 VSS VLCD 2VLCD / 3 VLCD / 3 VSS VLCD 2VLCD / 3 VLCD / 3 VSS VLCD 2VLCD / 3 VLCD / 3 VSS VLCD 2VLCD / 3 VLCD / 3 0 V VLCD 2VLCD / 3 −2VLCD / 3 VLCD / 3 −VLCD / 3 −VLCD 0 V VLCD 2VLCD / 3 −2VLCD / 3 VLCD / 3 −VLCD / 3 −VLCD VSS VLCD 2VLCD / 3 VLCD / 3 |
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