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SC18IM700IPW Datasheet(PDF) 3 Page - NXP Semiconductors |
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SC18IM700IPW Datasheet(HTML) 3 Page - NXP Semiconductors |
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3 / 22 page ![]() SC18IM700_2 © NXP B.V. 2007. All rights reserved. Product data sheet Rev. 02 — 10 August 2007 3 of 22 NXP Semiconductors SC18IM700 Master I2C-bus controller with UART interface 6. Pinning information 6.1 Pinning 6.2 Pin description Fig 2. Pin configuration for TSSOP16 SC18IM700IPW GPIO0 GPIO7 GPIO1 GPIO4 RESET GPIO5 VSS WAKEUP GPIO2 VDD GPIO3 GPIO6 SDA TX SCL RX 002aab798 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 Table 2. Pin description Symbol Pin Type Description GPIO0 1 I/O programmable I/O pin GPIO1 2 I/O programmable I/O pin RESET 3 I hardware reset input VSS 4 - ground GPIO2 5 I/O programmable I/O pin GPIO3 6 I/O programmable I/O pin SDA 7 I/O I2C-bus data pin SCL 8 O I2C-bus clock output RX 9 I RS-232 receive input TX 10 O RS-232 transmit input GPIO6 11 I/O programmable I/O pin VDD 12 - power supply WAKEUP 13 I Wake up SC18IM700 from Power-down mode. Pulling LOW by the host to wake up the device. A 1 k Ω resistor must be connected between VDD and this pin. GPIO5 14 I/O programmable I/O pin GPIO4 15 O programmable I/O pin GPIO7 16 O programmable I/O pin |
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