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M68HC05 Datasheet(PDF) 64 Page - Freescale Semiconductor, Inc |
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M68HC05 Datasheet(HTML) 64 Page - Freescale Semiconductor, Inc |
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64 / 128 page ![]() Technical Data MC68HC05J1A — Rev. 3.0 Parallel Input/Output (I/O) Parallel Input/Output (I/O) 7.4.3 Pulldown Register A All port A pins have mask-optional, programmable pulldown devices that typically sink 100 µA. Clearing the PDIA7–PDIA0 bits in pulldown register A (PDRA) turns on the pulldown devices. See Figure 7-3. Pulldown register A can turn on a port A pulldown device only when the port A pin is an input. Reset clears the PDIA7–PDIA0 bits, turning on all the port A pulldown devices. PDIA7–PDIA0 — Port A Pulldown Inhibit Bits Writing logic 0s to these write-only bits turns on the port A pulldown devices. Reading pulldown register A returns undefined data. 1 = Corresponding port A pin pulldown device turned off 0 = Corresponding port A pin pulldown device turned on NOTE: Avoid a floating port A input by clearing its pulldown register bit before changing its DDRA bit from logic 1 to logic 0. Do not use read-modify-write instructions on pulldown register A. Address: $0010 Bit 7 6 54321 Bit 0 Read: Write: PDIA7 PDIA6 PDIA5 PDIA4 PDIA3 PDIA2 PDIA1 PDIA0 Reset: 00 000000 = Unimplemented Figure 7-3. Pulldown Register A (PDRA) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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