DS31400GN datasheet(2/5 Pages) MAXIM

Part #	DS31400GN

Description	8-Input, 14-Output, Dual DPLL Timing IC with Sub-ps Output Jitter

PDF	5 Pages

Scroll/Zoom	100%

Manufacturer	MAXIM [Maxim Integrated Products]

Direct Link	https://www.maximintegrated.com/en.html

Logo

2 / 5 page

DS31400

________________________________________________________ Maxim Integrated Products

Application Example

DPLL1 Path

system timing

from master and slave

timing cards

IC1

DS31400

DPLL2 Path

IC2

19.44MHz, 38.88MHz,

25MHz, etc.

line timing

to master and slave

timing cards

8kHz, 19.44MHz,

38.88MHz, 25MHz, etc.

OC6

OC7

recovered line clocks from SERDES

SONET/SDH, 1GE, 10GE, OTN, FC etc.

frequencies can be unrelated to one another

155.52M, 622.08M, 25M,

125M, 156.25M, etc. with or

without fractional scaling for

FEC, 64B/66B, etc.

MANY other rates possible,

including DS1, E1, DS3, E3,

10M and Nx19.44M.

IC3 to IC8

3 unrelated frequencies simultaneously at <1ps rms jitter

plus other frequencies at somewhat higher jitter

clock monitoring and selection,

undo fractional scaling,

frequency conversion

clock monitoring and selection,

hitless switching, holdover, frequency

conversion, fractional scaling,

jitter attenuation

OC1 to OC5

clocks to line card SERDES

SONET/SDH, 1GE, 10GE, OTN, FC, etc.

ABRIDGED DATA SHEET

DS31400GN Datasheet(PDF) 2 Page - Maxim Integrated Products

DS31400GN Datasheet(HTML) 2 Page - Maxim Integrated Products

Html Pages

1 2 3 4 5

Datasheet Download

Link URL