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PIC16F785T-E/P Datasheet(PDF) 35 Page - Microchip Technology |
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PIC16F785T-E/P Datasheet(HTML) 35 Page - Microchip Technology |
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35 / 206 page ![]() © 2008 Microchip Technology Inc. DS41249E-page 33 PIC16F785/HV785 REGISTER 3-2: OSCCON: OSCILLATOR CONTROL REGISTER U-0 R/W-1 R/W-1 R/W-0 R-q R-0 R-0 R/W-0 — IRCF2 IRCF1 IRCF0 OSTS(1) HTS LTS SCS bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 7 Unimplemented: Read as ‘0’ bit 6-4 IRCF<2:0>: Internal Oscillator Frequency Select bits 000 =31 kHz 001 =125 kHz 010 =250 kHz 011 =500 kHz 100 =1 MHz 101 =2 MHz 110 =4 MHz 111 =8 MHz bit 3 OSTS: Oscillator Start-up Time-out Status bit(1) 1 = Device is running from the external system clock defined by FOSC<2:0> 0 = Device is running from the internal system clock (HFINTOSC or LFINTOSC) bit 3 PD: Power-down bit 1 = After power-up or by the CLRWDT instruction 0 = By execution of the SLEEP instruction bit 2 HTS: HFINTOSC (High Frequency – 8 MHz to 125 kHz) Status bit 1 = HFINTOSC is stable 0 = HFINTOSC is not stable bit 1 LTS: LFINTOSC (Low Frequency – 31 kHz) Stable bit 1 = LFINTOSC is stable 0 = LFINTOSC is not stable bit 0 SCS: System Clock Select bit 1 = Internal oscillator is used for system clock 0 = Clock source defined by FOSC<2:0> Note 1: Bit resets to ‘0’ with Two-Speed Start-up and LP, XT or HS selected as the Oscillator mode or Fail-Safe mode is enabled, otherwise this bit resets to ‘1’ |
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