16F648 datasheet(26/180 Pages) MICROCHIP

26 / 180 page

PIC16F627A/628A/648A

DS40044G-page 26

4.2.2.3

INTCON Register

The INTCON register is a readable and writable

for all interrupt sources except the comparator module.

See

Section 4.2.2.4

“PIE1

and

Section 4.2.2.5 “PIR1 Register”

for a description of

the comparator enable and flag bits.

INTCON – INTERRUPT CONTROL REGISTER (ADDRESS: 0Bh, 8Bh, 10Bh, 18Bh)

Note:

Interrupt flag bits get set when an interrupt

condition occurs regardless of the state of

its corresponding enable bit or the global

enable bit, GIE (INTCON<7>).

R/W-0

R/W-x

GIE

PEIE

T0IE

INTE

RBIE

T0IF

INTF

RBIF

bit 7

bit 0

bit 7

GIE:

Global Interrupt Enable bit

= Enables all un-masked interrupts

= Disables all interrupts

bit 6

PEIE

: Peripheral Interrupt Enable bit

= Enables all un-masked peripheral interrupts

= Disables all peripheral interrupts

bit 5

T0IE

: TMR0 Overflow Interrupt Enable bit

= Enables the TMR0 interrupt

= Disables the TMR0 interrupt

bit 4

INTE

: RB0/INT External Interrupt Enable bit

= Enables the RB0/INT external interrupt

= Disables the RB0/INT external interrupt

bit 3

RBIE

: RB Port Change Interrupt Enable bit

= Enables the RB port change interrupt

= Disables the RB port change interrupt

bit 2

T0IF

: TMR0 Overflow Interrupt Flag bit

= TMR0 register has overflowed (must be cleared in software)

= TMR0 register did not overflow

bit 1

INTF

: RB0/INT External Interrupt Flag bit

= The RB0/INT external interrupt occurred (must be cleared in software)

= The RB0/INT external interrupt did not occur

bit 0

RBIF

: RB Port Change Interrupt Flag bit

= When at least one of the RB<7:4> pins changes state (must be cleared in software)

= None of the RB<7:4> pins have changed state

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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