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LTC3521

3521f

Soft-Start

The buck converters have an internal voltage mode

soft-start circuit with a nominal duration of 500μs. The

converters remain in regulation during soft-start and will

therefore respond to output load transients which occur

during this time. In addition, the output voltage rise time

has minimal dependency on the size of the output capaci-

tor or load current.

Error Amplifier and Compensation

The LTC3521 buck converters utilize an internal transcon-

ductance error amplifier. Compensation of the feedback

loop is performed internally to reduce the size of the

application circuit and simplify the design process. The

compensation network has been designed to allow use of

a wide range of output capacitors while simultaneously

ensuring rapid response to load transients.

PGOOD Comparators

The PGOOD2 and PGOOD3 pins are open-drain outputs

which indicate the status of the buck converters. If

the buck output voltage falls 9% below the regulation

voltage, the respective PGOOD open-drain output will

pull low. The output voltage must rise 2% above the

falling threshold before the pull-down will turn off. In

addition, there is a 60μs typical deglitching delay in

the flag in order to prevent false trips due to voltage

transients on load steps. The respective PGOOD output

will also pull low during overtemperature shutdown,

undervoltage lockout or if the respective buck con-

verter SHDN pin is pulled low to indicate these fault

conditions.

BUCK-BOOST CONVERTER OPERATION

PWM Mode Operation

When the PWM pin is held high, the LTC3521 buck-boost

converter operates in a constant-frequency PWM mode

with voltage mode control. A proprietary switching algo-

rithm allows the converter to switch between buck, buck-

boost and boost modes without discontinuity in inductor

current or loop characteristics. The switch topology for

the buck-boost converter is shown in Figure 1.

When the input voltage is significantly greater than the

output voltage, the buck-boost converter operates in

buck mode. Switch D turns on continuously and switch

C remains off. Switches A and B are pulse width modu-

lated to produce the required duty cycle to support the

output regulation voltage. As the input voltage decreases,

switch A remains on for a larger portion of the switching

cycle. When the duty cycle reaches approximately 85%,

the switch pair AC begins turning on for a small fraction

of the switching period. As the input voltage decreases

further, the AC switch pair remains on for longer durations

andthedurationoftheBDphasedecreasesproportionally.

As the input voltage drops below the output voltage, the

AC phase will eventually increase to the point that there is

no longer any BD phase. At this point, switch A remains on

continuously while switch pair CD is pulse width modu-

lated to obtain the desired output voltage. At this point,

the converter is operating solely in boost mode.

This switching algorithm provides a seamless transition

between operating modes and eliminates discontinuities

in average inductor current, inductor current ripple and

loop transfer function throughout all three operational

operaTion

PGND1B

PGND1A

LTC3521

SW1A

SW1B

3521 F01

VOUT1

PVIN1

Figure 1. Buck-Boost Switch Topology

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