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CAT5270 Datasheet(PDF) 2 Page - ON Semiconductor

Part # CAT5270
Description  Dual Digitally Programmable Potentiometers (DPP) with 256 Taps & I2C Compatible Interface
PDF  10 Pages
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Manufacturer  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
Logo ONSEMI - ON Semiconductor

CAT5270 Datasheet(HTML) 2 Page - ON Semiconductor

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CAT5270
http://onsemi.com
2
Pin Description
SCL: Serial Clock
The CAT5270 serial clock input pin is used to clock all
data transfers into or out of the device.
SDA: Serial Data
The CAT5270 bidirectional serial data pin is used to
transfer data into and out of the device. The SDA pin is an
open drain output and can be wire−OR’d with the other open
drain or open collector I/Os.
A0, A1, A2, A3: Device Address Inputs
These inputs set the device address when addressing
multiple devices. A total of sixteen devices can be addressed
on a single bus. A match in the slave address must be made
with the address input in order to initiate communication
with the CAT5270.
RH, RL: Resistor End Points
The two sets of RH and RL pins are equivalent to the
terminal connections on a mechanical potentiometer.
RW: Wiper
The RW pins are equivalent to the wiper terminal of a
mechanical potentiometer.
Table 1. PIN DESCRIPTION
Pin #
TSSOP−14
Name
Function
1
A0
Device Address, LSB
2
VCC
Supply Voltage
3
RL0
Low Reference Terminal for
Potentiometer 0
4
RH0
High Reference Terminal for
Potentiometer 0
5
RW0
Wiper Terminal for Potentiometer 0
6
A2
Device Address
7
SDA
Serial Data Input/Output
8
A1
Device Address
9
RL1
Low Reference Terminal for
Potentiometer 1
10
RH1
High Reference Terminal for
Potentiometer 1
11
RW1
Wiper Terminal for Potentiometer 1
12
GND
Ground
13
SCL
Bus Serial Clock
14
A3
Device Address
Device Operation
The CAT5270 is two resistor arrays integrated with an I2C
compatible interface and two 8−bit wiper control registers.
Each resistor array contains 255 separate resistive elements
connected in series. The physical ends of each array are
equivalent to the fixed terminals of a mechanical
potentiometer (RH and RL). The tap positions between and
at the ends of the series resistors are connected to the output
wiper terminals (RW) by a CMOS transistor switch. Only
one tap point for each potentiometer is connected to its wiper
terminal at a time and is determined by the value of the wiper
control register. Data can be read or written to the wiper
control register via the I2C compatible interface. Also, the
device can be instructed to operate in an “increment/
decrement” mode.



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