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P9S12XEP100F1VVLR Datasheet(PDF) 35 Page - Freescale Semiconductor, Inc |
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P9S12XEP100F1VVLR Datasheet(HTML) 35 Page - Freescale Semiconductor, Inc |
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35 / 1324 page ![]() Chapter 1 Device Overview MC9S12XE-Family MC9S12XE-Family Reference Manual Rev. 1.21 Freescale Semiconductor 35 Because of an order from the United States International Trade Commission, BGA-packaged product lines and partnumbers indicated here currently are not available from Freescale for import or sale in the United States prior to September 2010 Figure 1-2. MC9S12XE100 Global Memory Map 0x7F_FFFF 0x00_0000 0x13_FFFF 0x0F_FFFF 256 K EEEPROM RAM 0x00_07FF EPAGE RPAGE PPAGE 0x3F_FFFF CPU and BDM Local Memory Map Global Memory Map 0x1F_FFFF 0xFFFF Reset Vectors 0xC000 0x8000 Unpaged 0x4000 0x1000 0x0000 16K FLASH window 0x0C00 0x2000 0x0800 8K RAM 4K RAM window 1K EEPROM 2K REGISTERS 1K EEPROM window 16K FLASH Unpaged 16K FLASH 2K REGISTERS Unimplemented RAM External Space RAM_LOW FLASH FLASH_LOW Unimplemented FLASH RESOURCES NOTE: On smaller derivatives the flash memory map is split into 2 ranges separated by an unimplemeted range, as depicted by the dashed lines. For more information refer to tables below and MMC section. |
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