CC8520

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SWRS091A – MARCH 2010

5

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AUDIO PLL CHARACTERISTICS

PARAMETER

TEST CONDITION

MIN

TYP

MAX

UNIT

MCLK Frequency range

Programmable using the PPW Configurator [1]

BCLK Frequency range

Programmable using the PPW Configurator [1]

WCLK Frequency range

31.936

48.096

kHz

RMS jitter

RMS period jitter for 1000 periods

80

200

ps

1

PIN DESCRIPTION

Figure 1 - CC8520 QFN Package Top View

PIN

PIN NAME

PIN TYPE

DESCRIPTION

-

GND

Ground

The exposed die attach pad must be connected to a solid ground plane underneath the

chip

1

XANTN

Digital I/O

1

FW2.0: Controlling external antenna switch (FW1.0/FW1.1: NC)

2

XANTP

Digital I/O

1

FW2.0: Controlling external antenna switch (FW1.0/FW1.1: NC)

3

CS_N

Digital Input

(pull-up)

Serial SPI configuration interface, active low chip select

4

SCLK

Digital I/O

1

Serial SPI configuration interface, clock input/output

5

MOSI

Digital I/O

1

Serial SPI configuration interface, master data input, slave data output

6

MISO

GIO0

Digital I/O

1

Serial SPI configuration interface, master data output, slave data input GIO0 output when

CS_N is deasserted.

General-purpose digital I/O pin 0

7

GIO1

Digital I/O

1

General-purpose digital I/O pin 1

Configurable with PurePath™ Wireless Configurator

8

GIO2

Digital I/O

1

General-purpose digital I/O pin 2

9

GIO3

Digital I/O

2

General-purpose digital I/O pin 3

Configurable with PurePath™ Wireless Configurator