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TMS320DM647 Datasheet(PDF) 162 Page - Texas Instruments |
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TMS320DM647 Datasheet(HTML) 162 Page - Texas Instruments |
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162 / 181 page  TMS320DM647 TMS320DM648 SPRS372F – JANUARY 2010 – REVISED SEPTEMBER 2009 www.ti.com Table 6-77. Ethernet Switch Registers (continued) HEX ADDRESS RANGE REGISTER ACRONYM DESCRIPTION 0x02D0 3480 NETOCTETS CPSW_STATS NetOctets 0x02D0 3484 RXSOFOVERRUNS CPSW_STATS Receive FIFO or DMA Start of Frame Overruns 0x02D0 3488 RXMOFOVERRUNS CPSW_STATS Receive FIFO or DMA Mid of Frame Overruns 0x02D0 348C RXDMAOVERRUNS CPSW_STATS Receive DMA Start of Frame and Middle of Frame Overruns 0x02D0 3490 - 0x02D0 34FC reserved 0x02D0 3500 ALE_IDVER ALE Identification and Version Register 0x02D0 3504 reserved 0x02D0 3508 ALE_CONTROL ALE Control Register 0x02D0 350C reserved 0x02D0 3510 ALE_PRESCALE ALE Prescale Register 0x02D0 3514 reserved 0x02D0 3518 ALE_UNKNOWN_VLAN ALE Unknown VLAN Register 0x02D0 351C reserved 0x02D0 3520 ALE_TBLCTL ALE Table Control Register 0x02D0 3524 - 0x02D0 3530 reserved 0x02D0 3534 ALE_TBLW2 ALE Table Word 2 Register 0x02D0 3538 ALE_TBLW1 ALE Table Word 1 Register 0x02D0 353C ALE_TBLW0 ALE Table Word 0 Register 0x02D0 3540 ALE_PORTCTL0 ALE Port 0 Control Register 0x02D0 3544 ALE_PORTCTL1 ALE Port 1 Control Register 0x02D0 3548 ALE_PORTCTL2 ALE Port 2 Control Register 0x02D0 354C - 0x02D0 37FF reserved Table 6-78. Ethernet Subsystem Registers HEX ADDRESS RANGE REGISTER ACRONYM DESCRIPTION 0x02D0 2000 IDVER Identification and Version Register 0x02D0 2004 SOFT_RESET Soft Reset Register 0x02D0 2008 EM_CONTROL Emulation Control Register 0x02D0 200C INT_CONTROL Interrupt Control Register 0x02D0 2010 RX_THRESH_EN Receive Threshold Interrupt Enable Register 0x02D0 2014 RX_EN Receive Interrupt Enable Register 0x02D0 2018 TX_EN Transmit Interrupt Enable Register 0x02D0 201C MISC_EN Misc Interrupt Enable Register 0x02D0 2020 RX_THRESH_STAT Receive Threshold Masked Interrupt Status Register 0x02D0 2024 RX_STAT Receive Interrupt Masked Interrupt Status Register 0x02D0 2028 TX_STAT Transmit Interrupt Masked Interrupt Status Register 0x02D0 202C MISC_STAT Misc Interrupt Masked Interrupt Status Register 0x02D0 2030 RX_IMAX Receive Interrupts Per Millisecond 0x02D0 2034 TX_IMAX Transmit Interrupts Per Millisecond Table 6-79. SGMII0 Registers HEX ADDRESS RANGE REGISTER NAME DESCRIPTION 0x02D0 4800 IDVER Identification and Version Register 0x02D0 4804 SOFT_RESET Soft Reset Register 162 Peripheral Information and Electrical Specifications Copyright © 2010–2009, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Link(s): TMS320DM647 TMS320DM648 |
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