TUSB1106 datasheet(6/33 Pages) TI

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Power-Supply Configurations

TUSB1105, TUSB1106

ADVANCED UNIVERSAL SERIAL BUS TRANSCEIVERS

SCAS818D – MAY 2006 – REVISED FEBRUARY 2008

Receiving Function (Pin OE = H)

DATA STATE

D+, D–

RCV

VP(1)

VM(1)

LOW

FULL

SPEED

Differential

logic 0

Differential

logic 1

SE0

RCV*(2)

(1)

VP = VM = H indicates the sharing mode (VCC(5.0) and Vreg(3.3) are

disconnected).

(2)

RCV* denotes the signal level on output RCV just before SE0 state

occurs. This level is stable during the SE0 period.

The TUSB1105/1106 can be used with different power-supply configurations, which can be dynamically changed.

An overview is given in Table 2.

• Normal mode – Both V

CC(I/O) and VCC(5.0) or (VCC(5.0) and Vreg(3.3)) are connected. For 5-V operation, VCC(5.0) is

connected to a 5-V source (4 V to 5.5 V). The internal voltage regulator then produces 3.3 V for the USB

connections. For 3.3-V operation, both VCC(5.0) and Vreg(3.3) are connected to a 3.3-V source (3 V to 3.6 V).

VCC(I/O) is independently connected to a voltage source (1.65 V to 3.6 V), depending on the supply voltage of

the external circuit.

• Disable mode – V

CC(I/O) is not connected, VCC(5.0) or (VCC(5.0) and Vreg(3.3)) are connected. In this mode, the

internal circuits of the TUSB1105 and TUSB1106 ensure that the D+ and D– pins are in 3-state and the

power consumption drops to the low-power (suspended) state level. Some hysteresis is built into the

detection of VCC(I/O) lost.

• Sharing mode – V

CC(I/O) is connected, (VCC(5.0) and Vreg(3.3)) are not connected. In this mode, the D+ and D–

pins are made 3-state and the TUSB1105 and TUSB1106 allow external signals of up to 3.6 V to share the

D+ and D– lines. The internal circuits of the TUSB1105 and TUSB1106 ensure that virtually no current

(maximum 10

µA) is drawn via the D+ and D– lines. The power consumption through V

CC(I/O) drops to the

low-power (suspended) state level. Both the VP and VM pins are driven HIGH to indicate this mode. Pin RCV

is made LOW. Some hysteresis is built into the detection of Vreg(3.3) lost.

Table 1. Pin States in Disable or Sharing Mode

PINS

DISABLE-MODE STATE

SHARING-MODE STATE

VCC(5.0)/Vreg(3.3)

5-V input/3.3-V output, 3.3-V input/3.3-V input

Not present

VCC(I/O)

Not present

1.65-V to 3.6-V input

Vpu(3.3)

High impedance (off)

D+, D–

High impedance

VP, VM

Invalid(1)

RCV

Invalid(1)

Inputs (VO/VPO, FSE0/VMO, SPEED,

High impedance

MODE(2), SUSPND, OE, SOFTCON)

(1)

High impedance or driven LOW

(2)

TUSB1105 only

Table 2. Power-Supply Configuration Overview

VCC(5.0) or Vreg(3.3)

VCC(I/O)

CONFIGURATION

SPECIAL CHARACTERISTICS

Connected

Normal mode

D+, D–, and Vpu(3.3) are in high impedance.

Connected

Not connected

Disable mode

VP, VM, and RCV are invalid.(1)

D+, D–, and Vpu(3.3) are in high impedance.

Not connected

Connected

Sharing mode

VP and VM are driven HIGH. RCV is driven LOW.

(1)

High impedance or driven LOW

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