10-3
RF2607
Rev B2 010720
10
Pin
Function
Description
Interface Schematic
1
CDMA+
CDMA balanced input pin. This pin is internally DC-biased and should
be DC blocked if connected to a device with a DC level other than VCC
present. A DC to connection to VCC is acceptable. For single-ended
input operation, one pin is used as an input and the other CDMA input
is AC-coupled to ground. The balanced input impedance is 1k
Ω, while
the single-ended input impedance is 500
Ω.
2
CDMA-
Same as pin 2, except complementary input.
See pin 1.
3GND
Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.
4FM+
FM balanced input pin. This pin is internally DC-biased and should be
DC blocked if connected to a device with DC present. For single-ended
input operation, one pin is used as an input and the other FM input is
AC-coupled to ground. The balanced input impedance is 1.7k
Ω,while
the single-ended input impedance is 850
Ω.
5FM-
Same as pin 4, except complementary input.
See pin 4.
6GND
Same as pin 3.
7
IN SELECT
Selects which IF input (CDMA or FM) is used. This is a digitally con-
trolled input. A logic "high" selects the CDMA input amplifier. A logic
"low" selects the FM input amplifier. The threshold voltage is approxi-
mately 1.3V.
8NC
No Connection pin. This pin is internally biased and should not be con-
nected to any external circuitry, including ground or VCC.
9OUT-
Balanced output pin. This is an open-collector output, designed to
operate into a 250
Ω balanced load. The load sets the operating imped-
ance, but an external choke or matching inductor to VCC must also be
supplied in order to correctly bias this output. This bias inductor is typi-
cally incorporated in the matching network between the output and next
stage. Because this pin is biased to VCC, a DC-blocking capacitor must
be used if the next stage’s input has a DC path to ground.
10
OUT+
Same as pin 9, except complementary output.
See pin 9.
11
GND
Same as pin 3.
12
GND
Same as pin 3.
13
VCC
Supply voltage pin. External bypassing is required. The trace length
between the pin and the bypass capacitors should be minimized. The
ground side of the bypass capacitors should connect immediately to
ground plane.
14
VCC
Same as pin 13.
15
VCC
Same as pin 13.
16
GC
Analog gain adjustment for all amplifiers. Valid control ranges are from
0V to 3.0V. Maximum gain is selected with 3.0V. Minimum gain is
selected with 0V. These voltages are only valid for a 4.7k
Ω DC source
impedance.
700
Ω
BIAS
700
Ω
CDMA-
CDMA+
650
Ω
BIAS
650
Ω
FM-
FM+
20 k
Ω
IN SELECT
OUT-
OUT+
23.5 k
Ω
15 k
Ω
12.7 k
Ω
V
CC
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