11-117
RF2915
Rev A7 001011
11
* LVL ADJ pin must be low to disable transmitter.
Pin
Function
Description
Interface Schematic
28
VCC1
This pin is used to supply DC bias to the LNA, Mixer, first IF amplifier
and Bandgap reference. A RF bypass capacitor should be connected
directly to this pin and returned to ground. A 22 pF capacitor is recom-
mended for 915MHz applications. A 68pF capacitor is recommended
for 433MHz applications.
29
DATA OUT
Demodulated data output from the demodulator. Output levels on this
are TTL/CMOS compatible. The magnitude of the load impedance is
intended to be 1M
Ω or greater. When using a RF2915 transmitter and
receiver back to back a data inversion will occur with low side LO injec-
tion.
30
VCC3
This pin is used to supply DC bias and colletor current to the transmitter
PA. It also supplies voltage to the 2nd IF amplifier, Demodulator and
data slicer. A RF bypass capacitor should be connected directly to this
pin and returned to ground. A 22 pF capacitor is recommended for
915MHz applications. A 68pF capacitor is recommended for 433MHz
applications.
31
LVL ADJ
This pin is used to vary the transmitter output power. An output level
adjustment range greater than 12dB is provided through analog volt-
age control of this pin. DC current of the transmitter power amp is also
reduced with output power.
NOTE: This pin MUST be low when the transmitter is disabled.
32
RX ENABL
Enable pin for the receiver circuits. RX ENABL>2.0V powers up all
receiver functions. RX ENABL<1.0V turns off all receiver functions
except the PLL functions and the RF mixer.
Operation
Mode
TX ENABL
RX ENABL
Function
Sleep Mode
Low
Low
Entire chip is powered down. Total current consumption is < 1
µA. *
Transmit Mode
High
Low
Transmitter, VCO are on.
Receive Mode
Low
High
Receiver, VCO are on. *
PLL Lock
High
High
VCO is on. This mode allows time for a synthesizer loop to lock without
spending current on the transmitter or receiver.
DATA OUT
400
4k
Ω
LVL ADJ
40 k
Ω
50 k
Ω
RX ENABL
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