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BA1604F Datasheet(PDF) 3 Page - Rohm |
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BA1604F Datasheet(HTML) 3 Page - Rohm |
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3 / 5 page ![]() 1 C1R1 214 Communication ICs BA1604 / BA1604F FMeasurement circuit FApplication example FAttached components (1) C1 and R1 : Setting f0 The center frequency (f0) is determined by the resistor R1 between Pins 5 and 6, and the capacitor C1 between Pin 6 and the ground. The constants at this point are deter- mined as follows : f0 (kHz) (C : µ F, R : kΩ) A rectangular-wave voltage is output at Pin 5; the peak- to-peak amplitude is between VCC and 1.4 V, and the av- erage DC value is VCC / 2. This pin can drive a load resis- tance of up to 1k Ω. (The recommended value for R1, however, is from 2k Ω to 20kΩ.) A 1V peak-to-peak exponential function triangular wave with an average DC voltage level of VCC / 2 is output at Pin 6. Since loading this pin adversely affects both the duty cycle and the temperature stability of the oscillator, it must only be connected to a high-impedance load. (2) C2 : Loop filter Connected between Pin 2 and the ground, C2 functions as a low pass filter for the PLL circuit, and the time constant is determined by T2 = R2C2 (R2 is the internal im- pedance for Pin 2, at 10 k Ω). The value of C2 also deter- mines the detection bandwidth. The voltage at Pin 2 va- ries linearly at 20mV / % of f0 over the range 0.95 f0 to 1.05 f0. (3) C3 : Output filter Capacitor C3, connected between Pin 1 and the ground, is used as a low pass filter to suppress out-of-band sig- nals. The time constant T3 is determined by T3 = R3C3 (R3 is the internal impedance for Pin 1, at 4.7k Ω). To prevent false detection of spurious signals, it is recom- mended that C3 y 2 C2. If C3 is made too large, howev- er, this will increase the time required for voltage changes at Pin 1 to reach the threshold of the phase detector, thus slowing the response time. (4) C4 : Input coupling capacitor (5) C5 : Power supply filter capacitor FInput and output pins (1) Input : Pin 3 The input signal is applied through a coupling capacitor to Pin 3. Internal circuits set this pin to a DC potential of 2V with respect to the ground. The input impedance is approximately 20k Ω. (2) Output : Pin 8 The output logic section has an internal power transistor with its collector connected to Pin 8. The load is con- nected between Pin 8 and VCC. The transistor saturates when an in-band input signal is received, dropping the potential at Pin 8 to less than 1V (0.6V Typ.). The output can also drive a load connected to a separate supply volt- age of up to 20V. |
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