6

Standard ICs

BU9729K

C / D

CS

SCK

SD

SCK

SD

Fig. 2 Interface timing

Fig. 3 Command cycle

Serial data is transmitted using four-line clock synchronous transmission. Serial data with a length of eight bits is

input synchronized to SCK. If C / D is HIGH at the rise of the 8

× nth clock of SCK, the serial data is recognized as a

command, and if C / D is LOW, the serial data is recognized as display data.

Serial data is input sequentially, starting from the MSB.