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S3C821 Datasheet(PDF) 32 Page - Samsung semiconductor |
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S3C821 Datasheet(HTML) 32 Page - Samsung semiconductor |
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32 / 33 page ![]() S3P821A OTP S3C821A/P821A 20-6 Table 20-4. D.C. Electrical Characteristics (Continued) (T A = – 40 °C to + 85 °C, V DD = 2.0 V to 5.5 V) Parameter Symbol Conditions Min Typ Max Unit VLC2 output voltage V LC2 V DD = 2.7 V to 5.5 V LCD clock = 0 Hz 0.8 V DD – 0.15 0.8 V DD 0.8 V DD + 0.15 V VLC3 output voltage V LC3 V LC1 = VDD 0.6 V DD – 0.15 0.6 V DD 0.6 V DD + 0.15 VLC4 output voltage V LC4 0.4 V DD – 0.15 0.4 V DD 0.4 V DD + 0.15 VLC5 output voltage V LC5 0.2 V DD – 0.15 0.2 V DD 0.2 V DD + 0.15 Pull-up resistors R L1 V IN = 0 V; TA = 25°C V DD = 3.0 ± 10%; Ports 0–5 30 80 200 k Ω R L2 V IN = 0 V; TA = 25 °C V DD = 3.0 ± 10 % RESET only 300 500 800 LCD voltage dividing resistor R LCD V LCD = 2.7 V to 5.5 V T A = 25 °C 45 65 80 k Ω Supply current I DD1 Run mode; V DD=5.0V±10% 6.0 MHz – 6.0 12 mA (note) Crystal oscillator C1 = C2 = 22 pF 4.19 MHz 4.5 9.0 V DD = 3.0 V ± 10 % 6.0 MHz 2.9 5.8 4.19 MHz 2.0 4.0 I DD2 Idle mode; V DD=5.0 V± 0% 6.0 MHz 1.3 2.6 Crystal oscillator C1 = C2 = 22 pF 4.19 MHz 1.2 2.4 V DD = 3.0 V ± 10 % 6.0 MHz 0.6 1.2 4.19 MHz 0.4 0.8 I DD3 Run mode; V DD = 3.0 V ± 10 % 32 kHz crystal oscillator 20 40 µA I DD4 Idle mode; V DD = 3.0 V ± 10 % 32 kHz crystal oscillator 7 14 I DD5 Stop mode; V DD = 5.0 V ± 10 % 0.5 3 Stop mode; V DD = 3.0 V ± 10 % 0.3 2 NOTES: 1. Supply current does not include current drawn through internal pull-up resistors, LCD voltage dividing resistors, and ADC. 2. IDD1 and IDD2 include power consumption for subsystem clock oscillation. 3. IDD3 and IDD4 are current when main system clock oscillation stops and the subsystem clock is used. 4. IDD5 is current when main system clock and subsystem clock oscillation stops. |
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