SC810 datasheet(12/20 Pages) SEMTECH

12 / 20 page

SC810

Figures 2a and 2b show low and high resistance ranges,

respectively.

Termination

When the battery voltage reaches V

CV, the SC810 transi-

tions from constant current regulation to constant voltage

regulation. While V

BAT

is regulated to V

, the current into

the battery decreases as the battery becomes fully

charged. When the output current drops below the termi-

nation threshold current, fixed at 10% of the programmed

fast-charge current, charging terminates. Upon termina-

tion, the STATB pin open drain output turns off and the

charger either enters monitor state or float-charges the

battery, depending on the logical state of the ENB input

pin.

Charger output current is the sum of the battery charge

current and the system load current. Battery charge

current changes gradually, and establishes a slowly dimin-

ishing lower bound on the output current while charging

in CV mode. The load current into a typical digital system

is highly transient in nature. Charge cycle termination is

detected when the sum of the battery charging current

and the greatest load current occurring within the imme-

diate 300μs to 550μs past interval is less than the pro-

grammed termination current. This timing behavior

permits charge cycle termination to occur during a brief

low-load-current interval, and does not require that the

longer interval average load current be small.

Applications Information (continued)

Termination threshold current accuracy is dominated by

offset error. The range of expected termination current

versus programming resistance is shown in Figures 3a

and 3b. The figures show the nominal termination current

versus nominal R

IPRGM

resistance as the center plot and

two theoretical limit plots indicating maximum and

minimum current versus nominal programming resis-

tance. These plots are derived from models of the

expected worst-case contribution of error sources

depending on programmed current. The current range

includes the uncertainty due to a 1% tolerance resistor.

The dots on each plot indicate the currents obtained with

the EIA E96 standard value 1% tolerance resistors. Figures

3a and 3b show low and high resistance ranges,

respectively.

Enable Input

The ENB pin is a tri-level logical input that allows selec-

tion of the following behaviors:

charging enabled with float-charging

after termination (ENB = low range)

charging enabled with float-charging dis-

abled and battery monitoring at termina-

tion (ENB = mid range)

charging disabled (ENB = high range).

The ENB pin is designed to interface to a processor GPIO

port powered from a peripheral supply voltage as low as

22.5

33.5

44.5

55.5

66.5

100

105

110

115

IPRGM

(kΩ), R-tol = 1%

Figure 3a — Termination Current Tolerance versus

Programming Resistance, Low Resistance Range

11121314

15161718

19202122

232425

26272829

IPRGM

(kΩ), R-tol = 1%

Figure 3b — Termination Current Tolerance versus

Programming Resistance, High Resistance Range

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