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SC1564 Datasheet(PDF) 9 Page - Semtech Corporation |
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SC1564 Datasheet(HTML) 9 Page - Semtech Corporation |
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9 / 11 page ![]() SC1564 9 Applications Information Introduction The SC564 is intended for applications such as graph- ics cards where high current capability and low drop- out voltage are required. It provides a very simple, low cost solution that uses little PCB real estate. Additional features include a shutdown pin to allow for a very low power consumption standby mode, and a fully adjust- able output. Component Selection Input capacitor: A µF ceramic capacitor is recommended. This allows for the device some distance from any bulk capacitance on the rail. Additionally, input droop due to load transients is reduced, improving load transient response. Additional capacitance may be added if required by the application. Output capacitor: A minimum bulk capacitance of µF, along with a 0.µF ceramic decoupling capacitor, is rec- ommended. Increasing the bulk capacitance will improve the overall transient response. The use of multiple lower value ceramic capacitors in parallel to achieve the desired bulk capacitance will not cause stability issues. Although designed for use with ceramic output capacitors, the SC564 is extremely tolerant of output capacitor ESR values and thus will also work comfortably with tantalum output capacitors. Noise immunity: In very electrically noisy environents, it is recommended that 0.µF ceramic capacitors be placed from IN to GND and OUT to GND as close to the device pins as possible. External voltage selection resistors: the use of % resis- tors, designed for a current flow ≥ 0µA is recommended to ensure a well-regulated output (tus, R2 ≤ 20kΩ). Thermal Considerations The power dissipation in the SC564 is approximately equal to the product of the output current and the input to output voltage differential: OUT OUT IN O I ) V (V P The absolute worst-case dissipation is given by: Q(MAX) IN(MAX) OUT(MAX) OUT(MIN) IN(MAX) O(MAX) I V I ) V V ( P ⋅ + ⋅ − = For a typical scenario, V IN = 3.3V ± 5%, VOUT = .5V and I OUT = 600mA, therefore: V IN(MAX) = 3.465V, V OUT(MIN) = .47V and I Q(MAX) = 70µA, Thus P D(MAX) = .976W. Using this figure, and assuming T A(MAX) = 85°C, we can calculate the maximum thermal impedance allowable to maintain T J ≤ 50°C: W C 54.3 1.1976W C 85 C 150 P T T R O(MAX) A(MAX) J(MAX) A)(MAX) TH(J This should be achievable with the 3mm x 3mm MLPD-8 package using PCB copper area to aid in conducting the heat away from the device. Internal ground/power planes and air flow will also assist in removing heat. |
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