117 datasheet(74/114 Pages) RENESAS

74 / 114 page

REJ03B0254-0110

Rev.1.10

Page 74 of 111

Jun 23, 2010

R32C/117 Group

5. Electrical Characteristics

Note:

The device is operationally guaranteed under these operating conditions.

Figure 5.1

Clock Cycle Time

Table 5.5

Operating Conditions (4/5)

(VCC = 3.0 to 5.5 V, VSS = 0 V, and Ta =Topr, unless otherwise noted) (1)

Symbol

Characteristic

Value

Unit

Min.

Typ.

Max.

f(XIN)

Main clock oscillator frequency

416

MHz

f(XRef)

Reference clock frequency

MHz

f(PLL)

PLL clock oscillator frequency

128

MHz

f(Base)

Base clock frequency

High speed

MHz

Normal speed

MHz

tc(Base)

Base clock cycle time

High speed

15.625

Normal speed

f(CPU)

CPU operating frequency

High speed

MHz

Normal speed

MHz

tc(CPU)

CPU clock cycle time

High speed

15.625

Normal speed

f(BCLK)

Peripheral bus clock operating frequency High speed

MHz

Normal speed

MHz

tc(BCLK)

Peripheral bus clock cycle time

High speed

31.25

Normal speed

f(PER)

Peripheral clock source frequency

MHz

f(XCIN)

Sub clock oscillator frequency

32.768

62.5

kHz

Base clock

(Internal signal)

t c(Base)

Peripheral bus clock

(Internal signal)

t c(BCLK)

CPU clock

(Internal signal)

t c(CPU)

117 Datasheet(PDF) 74 Page - Renesas Technology Corp

117 Datasheet(HTML) 74 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL