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REJ03B0254-0110

Rev.1.10

Page 102 of 111

Jun 23, 2010

R32C/117 Group

5. Electrical Characteristics

VCC =3.3 V

Timing Requirements (VCC = 3.0 to 3.6 V, VSS = 0 V, and Ta =Topr, unless otherwise noted)

Note:

The value is calculated by the following formulas based on a value SSC set by bits SSC4 to SSC0 in

the I2CSSCR register:

th(SDA-SCL)S = SSC ÷ 2 × tc(φIIC) + 40 [ns]

tsu(SCL-SDA)P = (SSC ÷ 2 + 1) × tc(φIIC) + 40 [ns]

tw(SDAH)P = (SSC + 1) × tc(φIIC) + 40 [ns]

Table 5.60

Multi-master I2C-bus Interface

Symbol

Characteristic

Value

Unit

Standard-mode

Fast-mode

Min.

Max.

Min.

Max.

tw(SCLH)

MSCL input high level pulse width

600

tw(SCLL)

MSCL input low level pulse width

600

tr(SCL)

MSCL input rise time

1000

300

tf(SCL)

MSCL input fall time

300

tr(SDA)

MSDA input rise time

1000

300

tf(SDA)

MSDA input fall time

300

th(SDA-SCL)S

MSCL high level hold time after start

condition/restart condition

(1)

2 × tc(φIIC) + 40

tsu(SCL-SDA)P

MSCL high level setup time for

restart condition/stop condition

(1)

2 × tc(φIIC) + 40

tw(SDAH)P

MSDA high level pulse width after

stop condition

(1)

4 × tc(φIIC) + 40

tsu(SDA-SCL)

MSDA input setup time

100

th(SCL-SDA)

MSDA input hold time

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