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ISL97635 Datasheet(PDF) 6 Page - Intersil Corporation |
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ISL97635 Datasheet(HTML) 6 Page - Intersil Corporation |
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6 / 28 page  6 FN6434.2 December 22, 2008 tHD:DAT Data Hold Time 300 ns tSU:DAT Data Setup Time 250 ns tLOW Clock Low Period 4.7 µs tHIGH Clock High Period 4.0 50 µs tF Clock/data Fall Time 300 ns tR Clock/data Rise Time 1000 ns GENERAL TIMING SPECIFICATIONS (Note 4) t1 Minimum Setup Time Between VIN Rising above VUVLO with EN = 1 and SMBus Communications EN = 1, TA = +25°C, VDC capacitor < 10µF 80 µs t2 Minimum Setup Time Between EN Going High with VIN above VUVLO and SMBus Communications VIN > VUVLO, TA= +25°C, VDC capacitor < 10µF 80 µs t3 Minimum Time Between VIN Rising above VUVLO with EN = 1 to SMBus BL CTRL On EN = 1, TA = +25°C 4.5 ms t4 Minimum Time Between EN Going High with VIN above VUVLO to SMBus BL CTRL On VIN > VUVLO, TA = +25°C 4.5 ms t5 Minimum Time for LED Output to Respond to SMBus Data at any Levels VIN > VUVLO, EN = 1, TA = +25°C 5µs t6 Response Time Between Backlight CTRL Off with Boost Not Switching to Backlight CTRL On with Boost Switching VIN > VUVLO, EN = 1, TA = +25°C 5µs t7 Response Time Between Backlight CTRL On with Boost Switching to Backlight CTRL Off with Boost Not Switching VIN > VUVLO, EN = 1, TA = +25°C 5µs t8 LED Channel Short Circuit Fault Detection to Status Register Data Ready VIN > VUVLO, EN = 1, TA = +25°C, LEDs Active 6ms t9 VOUT-GND Short Circuit Detection During Operation to Status Register Data Ready VIN > VUVLO, EN = 1, TA = +25°C, Fault FET used 5µs t10 Time Between VIN Rising Above VUVLO with EN = 1 and VOUT-GND Short being Reported in Status Register EN = 1, VDC capacitor < 10µF, TA = +25°C, Fault FET used. 30 ms t11 Time Between EN Going High with VIN Above VUVLO and a VOUT-GND Short being Reported in Status Register VIN > VUVLO, VDC capacitor < 10µF, TA = +25°C, Fault FET used. 30 ms CURRENT SOURCES Vheadroom Dominant Channel Current Source Headroom at IIN Pin ILED = 20mA, TA = +25°C 100 mV VRSET Voltage at RSET Pin RSET = 36.6kΩ 680 700 720 mV ILEDmax Maximum LED Current per Channel RSET = 20.9kΩ 35 mA PWM GENERATOR FPWM Generated PWM Frequency CFPWM = 27nF CPWMO = 220nF 200 Hz DPWM Duty Cycle Of Generated PWM (DC-to-PWM) VPWMO = 0.3V CFPWM = 27nF 90 % VPWMO = 1.1V CFPWM = 27nF 10 % tMAX_PWM_OFF Maximum PWMI Off Time Before Shutdown EN/PWMI toggles 28 ms Electrical Specifications All specifications below are tested at TA = -40°C to +85°C; VIN = 12V, EN = 5V, RSET = 36.6kΩ, unless otherwise noted. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are not production tested. (Continued) PARAMETER DESCRIPTION CONDITION MIN TYP MAX UNIT ISL97635 |
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