LM3445MM datasheet(20/26 Pages) NSC

20 / 26 page

Determining the capacitance value of the valley-fill ca-

pacitors:

The valley fill capacitors should be sized to supply energy to

the buck converter (V

BUCK) when the input line is less than its

peak divided by the number of stages used in the valley fill

X). The capacitance value should be calculated when the

triac is not firing, i.e. when full LED current is being drawn by

the LED string. The maximum power is delivered to the LED

string at this time, and therefore the most capacitance will be

needed.

30060352

FIGURE 19. Two Stage Valley-Ffill V

BUCK Voltage with no

TRIAC Dimming

From the above illustration and the equation for current in a

capacitor, i = C x dV/dt, the amount of capacitance needed at

BUCK will be calculated as follows:

At 60Hz, and a valley-fill circuit of two stages, the hold up time

X) required at VBUCK is calculated as follows. The total angle

of an AC half cycle is 180° and the total time of a half AC line

cycle is 8.33 ms. When the angle of the AC waveform is at

30° and 150°, the voltage of the AC line is exactly ½ of its

peak. With a two stage valley-fill circuit, this is the point where

the LED string switches from power being derived from AC

line to power being derived from the hold up capacitors (C7

and C9). 60° out of 180° of the cycle or 1/3 of the cycle the

power is derived from the hold up capacitors (1/3 x 8.33 ms

= 2.78 ms). This is equal to the hold up time (dt) from the

above equation, and dv is the amount of voltage the circuit is

allowed to droop. From the next section (“Determining Maxi-

mum Number of Series Connected LEDs Allowed”) we know

the minimum V

BUCK voltage will be about 45V for a 90VAC to

135V

AC line. At 90VAC low line operating condition input, ½ of

the peak voltage is 64V. Therefore with some margin the volt-

age at V

BUCK can not droop more than about 15V (dv). (i) is

equal to (P

OUT/VBUCK), where POUT is equal to (VLED x ILED).

Total capacitance (C7 in parallel with C9) can now be calcu-

lated. See “ Design Example" section for further calculations

of the valley-fill capacitors.

Determining Maximum Number of Series Connected

LEDs Allowed:

The LM3445 is an off-line buck topology LED driver. A buck

converter topology requires that the input voltage (V

BUCK) of

the output circuit must be greater than the voltage of the LED

stack (V

LED) for proper regulation. One must determine what

the minimum voltage observed by the buck converter will be

before the maximum number of LEDs allowed can be deter-

mined. Two variables will have to be determined in order to

accomplish this.

AC line operating voltage. This is usually 90V

AC to

135V

AC for North America. Although the LM3445 can

operate at much lower and higher input voltages a range

is needed to illustrate the design process.

How many stages are implemented in the valley-fill circuit

(1, 2 or 3).

In this example the most common valley-fill circuit will be used

(two stages).

30060354

FIGURE 20. AC Line with Firing Angles

Figure 21 show three triac dimmed waveforms. One can eas-

ily see that the peak voltage (V

PEAK) from 0° to 90° will always

be:

Once the triac is firing at an angle greater than 90° the peak

voltage will lower and equal to:

The voltage at V

BUCK with a valley fill stage of two will look

similar to the waveforms of figure 22.

The purpose of the valley fill circuit is to allow the buck con-

verter to pull power directly off of the AC line when the line

voltage is greater than its peak voltage divided by two (two

stage valley fill circuit). During this time, the capacitors within

the valley fill circuit (C7 and C8) are charged up to the peak

of the AC line voltage. Once the line drops below its peak

divided by two, the two capacitors are placed in parallel and

deliver power to the buck converter. One can now see that if

the peak of the AC line voltage is lowered due to variations in

the line voltage, or if the triac is firing at an angle above 90°,

the DC offset (V

DC) will lower. VDC is the lowest value that

voltage V

BUCK will encounter.

Example:

Line voltage = 90V

AC to 135VAC

Valley-Fill = two stage

Depending on what type and value of capacitors are used,

some derating should be used for voltage droop when the

LM3445MM Datasheet(PDF) 20 Page - National Semiconductor (TI)

LM3445MM Datasheet(HTML) 20 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26

Datasheet Download

Link URL