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M95320 Datasheet(PDF) 24 Page - STMicroelectronics |
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M95320 Datasheet(HTML) 24 Page - STMicroelectronics |
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24 / 44 page  Power-up and delivery state M95320, M95320-W, M95320-R 24/44 Doc ID 5711 Rev 12 7 Power-up and delivery state 7.1 Power-up state After Power-up, the device is in the following state: ● Standby Power mode ● deselected (after power-up, a falling edge is required on Chip Select (S) before any instructions can be started). ● not in the Hold condition ● the Write Enable Latch (WEL) is reset to 0 ● Write In Progress (WIP) is reset to 0 The SRWD, BP1 and BP0 bits of the Status Register are unchanged from the previous power-down (they are non-volatile bits). 7.2 Initial delivery state The device is delivered with the memory array set to all 1s (each byte = FFh). The Status register write disable (SRWD) and Block protect (BP1 and BP0) bits are initialized to 0. |
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