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Electrical Specifications

Table 2-10. GTL+ Signal Group DC Specifications

Symbol

Parameter

Min

Max

Unit

Notes1

NOTES:

Unless otherwise noted, all specifications in this table apply to all processor frequencies.

VIL

Input Low Voltage

0.0

GTLREF – (0.10 * VCC)V

2,3

VIL is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.

The VCC referred to in these specifications is the instantaneous VCC.

VIH

Input High Voltage

GTLREF + (0.10 * VCC)VCC

3,4,5

VIH is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.

VIH and VOH may experience excursions above VCC.

VOH

Output High Voltage

0.90*VCC

VCC

3,5

IOL

Output Low Current

N/A

VCC/

[0.50*RRTT_MIN+RON_MIN]

ILI

Input Leakage Current

N/A

± 200

µA

Leakage to VSS with pin held at VCC.

ILO

Output Leakage Current

N/A

± 200

µA

Leakage to VCC with pin held at 300 mV.

Ron_compatible Buffer On Resistance

6.33

10.33

Ω

These specifications are different depending on whether the platform is forward compatible to the Celeron D proces-

sor or if it is optimized for the Celeron D processor. A compatible platform is one that is designed for a previous gen-

eration processor but has some level of compatibility with the Celeron D processor. An optimized platform is one

designed specifically for the Celeron D processor; however, it may have some level of compatibility with previous

generation processors.

Ron_optimized

Buffer On Resistance

Ω

Table 2-11. Asynchronous GTL+ Signal Group DC Specifications

Symbol

Parameter

Min

Max

Unit

Notes1

NOTES:

Unless otherwise noted, all specifications in this table apply to all processor frequencies.

VIL

Input Low Voltage

0.0

VCC/2 – (0.10 * VCC)V

2,3

VIL is defined as the voltage range at a receiving agent that will be interpreted as a logical low value.

LINT0/INTR and LINT1/NMI use GTLREF as a reference voltage. For these two signals

VIH = GTLREF + (0.10 * VCC) and VIL= GTLREF – (0.10 * VCC).

VIH

Input High Voltage

VCC/2 + (0.10 * VCC)VCC

3,4,5,6

VIH is defined as the voltage range at a receiving agent that will be interpreted as a logical high value.

VIH and VOH may experience excursions above VCC.

The VCC referred to in these specifications refers to instantaneous VCC.

VOH

Output High Voltage

0.90*VCC

VCC

5,6,7

All outputs are open drain.

IOL

Output Low Current

—

VCC/[0.50*RTT_MIN+RON_MIN]A

The maximum output current is based on maximum current handling capability of the buffer and is not specified into

the test load.

IIL

Input Leakage Current

N/A

± 200

µA

Leakage to VSS with pin held at VCC.

ILO

Output Leakage Current

N/A

± 200

µA

10. Leakage to VCC with pin held at 300 mV.

Ron_compatible

Buffer On Resistance

6.33

10.33

Ron_optimized

Buffer On Resistance

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