305433 datasheet(19/75 Pages) INTEL

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80333

Datasheet

Intel® 80333 I/O Processor Datasheet

May 2005

Order Number: 305433, Revision: 002

Table 6.

PCI Express* Signals

Name

Count

Type

Description

REFCLK+/

REFCLK-

PCI Express* Differential Clock In: These pins receive a

100 MHz differential clock input from an external source. This

clock is used as the reference clock for the PCI Express*

circuitry.

PE0Tp[7:0]/

PE0Tn[7:0]

PCI Express* Serial Data Transmit: These eight differential

output pairs carry data and embedded clock for the PCI Express*

port 0 interface.

•

×8 Mode: All PE0Tp[7:0] and PE0Tn[7:0] signals are used.

•

×4 Mode: Only PE0Tp[3:0] and PE0Tn[3:0] signals are

used.

PE0Rp[7:0]/

PE0Rn[7:0]

PCI Express* Serial Data Receive: These eight differential

input pairs receive data and embedded clock for port 0.

•

×8 Mode: All PE0Rp[7:0] and PE0Rn[7:0] signals are used.

•

×4 Mode: Only PE0Rp[3:0] and PE0Rn[3:0] signals are

used.

PE_RCOMPO

PCI EXPRESS RCOMP: Connected to external reference

resistor. Output current path, used to compensate PCI Express*

driver and RX termination.

PE_ICOMPI

PCI EXPRESS RCOMP IN: Connected to the same external

resistor as PE_RCOMPO on the board, for input voltage sensing

comparator.

Total

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