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521 Datasheet(PDF) 87 Page - Intel Corporation |
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521 Datasheet(HTML) 87 Page - Intel Corporation |
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87 / 96 page ![]() Datasheet 87 Features 6.2.3 Stop-Grant State When the STPCLK# signal is asserted, the Stop-Grant state of the processor is entered 20 bus clocks after the response phase of the processor-issued Stop Grant Acknowledge special bus cycle. Since the GTL+ signals receive power from the FSB, these signals should not be driven (allowing the level to return to V TT) for minimum power drawn by the termination resistors in this state. In addition, all other input signals on the FSB should be driven to the inactive state. BINIT# will not be serviced while the processor is in Stop-Grant state. The event will be latched and can be serviced by software upon exit from the Stop Grant state. RESET# will cause the processor to immediately initialize itself, but the processor will stay in Stop-Grant state. A transition back to the Normal state will occur with the de-assertion of the STPCLK# signal. A transition to the HALT/Grant Snoop state will occur when the processor detects a snoop on the FSB (see Section 6.2.3). While in the Stop-Grant State, SMI#, INIT#, BINIT# and LINT[1:0] will be latched by the processor, and only serviced when the processor returns to the Normal State. Only one occurrence of each event will be recognized upon return to the Normal state. While in Stop-Grant state, the processor will process a FSB snoop. Figure 6-1. Processor Low Power State Machine Enhanced HALT or HALT State BCLK running Snoops and interrupts allowed Normal State Normal execution HALT Snoop State BCLK running Service snoops to caches Stop-Grant State BCLK running Snoops and interrupts allowed Snoop Event Occurs Snoop Event Serviced INIT#, BINIT#, INTR, NMI, SMI#, RESET#, FSB interrupts STPCLK# Asserted STPCLK# De-asserted Snoop Event Occurs Snoop Event Serviced HALT or MWAIT Instruction and HALT Bus Cycle Generated Grant Snoop State BCLK running Service snoops to caches |
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