R29 datasheet(196/473 Pages) RENESAS

196 / 473 page

R8C/28 Group, R8C/29 Group

14. Timers

Rev.2.10

Sep 26, 2008

Page 177 of 441

REJ09B0279-0210

Figure 14.28

TRCCR1 Register

Timer RC Control Register 1

Symbol

Address

After Reset

TRCCR1

0121h

00h

Bit Symbol

Bit Name

Function

NOTES:

3. The TRC counter performs free-running operation for the input capture function of the timer mode independent of the

CCLR bit setting.

Count source select bits(1)

b6 b5 b4

0 0 0 : f1

0 0 1 : f2

0 1 0 : f4

0 1 1 : f8

1 0 0 : f32

1 0 1 : TRCCLK input rising edge

1 1 0 : fOCO40M

1 1 1 : Do not set.

0 : Disable clear (free-running

operation)

1 : Clear by compare match in the

TRCGRA register

Bits CCLR, TOA, TOB, TOC and TOD are disabled for the input capture function of the timer mode.

TCK0

TCK1

TRC counter clear select bit(2, 3)

TCK2

Set to these bits w hen the TSTART bit in the TRCMR register is set to 0 (count stops).

TOC

TRCIOD output level select bit(1)

CCLR

TRCIOC output level select bit(1)

TOB

TRCIOA output level select bit(1)

TRCIOB output level select bit(1)

Function varies according to the

operating mode (function).(2)

b7 b6 b5 b4 b3 b2

TOD

b1 b0

TOA

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