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TLE6228 Datasheet(PDF) 5 Page - Infineon Technologies AG

Part # TLE6228
Description  Smart Quad Channel Low-Side Switch
PDF  19 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

TLE6228 Datasheet(HTML) 5 Page - Infineon Technologies AG

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Datasheet TLE 6228 G P
Electrical Characteristics
Parameter and Conditions
Symbol
Values
Unit
VS = 4.8 to 18 V ; Tj = - 40 °C to + 150 °C
(unless otherwise specified)
min
typ
max
1. Power Supply (VS)
Supply current (Outputs ON)
IS
8
mA
Supply current (Outputs OFF)
VENA = L, VSTBY = H
IS
4
mA
Standby current
VSTBY = L
IS
10
µA
Operating voltage
VS
4.8
32
V
2. Power Outputs
ON state resistance Channel 1,2
Tj = 25
� C
ID = 1A; VS
‡ 9.5 V
Tj = 150°C
RDS(ON)
0.23
0.26
0.5
W
ON state resistance Channel 3,4
Tj = 25
� C
ID = 1A; VS
‡ 9.5 V
Tj = 150°C
RDS(ON)
0.28
0.4
0.75
W
Z-Diode clamping voltage (OUT1...4)
ID
‡ 100 mA
VDS(AZ)
45
60
V
Pull down current
VSTBY = H, VIN = L
IPD
10
20
50
µA
Output leakage current
3
VSTBY = L, 0V
£ V
DS
£ 20V
IDlk
5
µA
Output turn on time
4
ID = 1 A
Output turn off time
4
ID = 1 A
Output on fall time
4
ID = 1 A
Output off rise time
4
ID = 1 A
Overload switch-off delay time
4
Output off status delay time
4
Failure extension Time for Status Report
Input Suppression Time
Open Load (off) filtering Time
5
ton
toff
tfall
trise
tDSO
tD
tD-failure
tD-IN
tfOL(off)
3
3
3
3
20
500
500
500
10
15
20
10
5
60
1200
1200
1200
30
50
60
30
30
100
3000
3000
3000
100
µs
3. Digital Inputs (IN1, IN2, IN3, IN4, ENA)
Input low voltage
VINL
- 0.3
1.0
V
Input high voltage
VINH
2.0
6.0
V
Input voltage hysteresis
5
VINHys
50
200
mV
Input pull down current
VIN = 5 V; VS
‡ 6.5 V
IIN
10
30
60
µA
Enable pull down current
VENA = 5 V; VS
‡ 6.5 V
IENA
10
20
40
µA
4. Digital Status Outputs (ST1 - ST4) Open Drain
Output voltage low
IST = 2 mA
VSTL
0.5
V
Leakage current high
ISTH
2
µA
3 If the output voltage exceeds 35V, this current (zener current of a internal structure) can rise up to 1mA
4 See timing diagram, resistive load condition; V
S
‡ 9 V
5 This parameter will not be testet but assured by design
V4.1
Page
5
2010-07-10



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