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TLE4269 Datasheet(PDF) 2 Page - Infineon Technologies AG |
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TLE4269 Datasheet(HTML) 2 Page - Infineon Technologies AG |
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2 / 19 page ![]() Data Sheet 2 Rev. 2.4, 2007-03-20 TLE 4269 Figure 1 Pin Configuration (top view) Table 1 Pin Definitions and Functions (TLE 4269 G) Pin No. Symbol Function 1I Input; block to GND directly at the IC with a ceramic capacitor. 2SI Sense Input; if not needed connect to Q. 3RADJ Reset Threshold Adjust; if not needed connect to GND. 4D Reset Delay; to select delay time, connect to GND via capacitor. 5GND Ground 6RO Reset Output; the open-collector output is internally linked to Q via a 20 k Ω pull-up resistor. Keep open, if not needed. 7SO Sense Output; the open-collector output is internally linked to the output via a 20 k Ω pull-up resistor. Keep open, if not needed. 8Q 5-V Output; connect to GND with a 10 µF capacitor, ESR < 10 Ω. GND RO SO D5 6 7 RADJ 8 4 3 2 1 AEP01668 Q Ι S Ι PG-DSO-8-16 |
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