Sensors

16

Freescale Semiconductor

MMA690xQ

2.9

SPI

The SPI is a full bidirectional port which is used for all configuration and control functions.

2.10

SELF-TEST INTERFACE

The self-test interface provides a mechanism for applying a calibrated voltage to the g-cell. This results in deflection of the

proof mass, causing reported acceleration results to be offset by a specified amount. Control of the self-test interface via the SPI

is accommodated through write operations involving the DEVCTL register at address $0E, described in Section 2.1.3.

2.11

ΣΔ CONVERTERS

Two sigma delta converters provide the interface between the g-cell and digital signal processing block. The output of each

ΣΔ converter is a data stream at a nominal frequency of 1.0 MHz.

2.12

DIGITAL SIGNAL PROCESSING BLOCK

A Digital Signal Processing (DSP) block is used to perform all filtering and correction operations. A diagram illustrating the

signal processing flow within the DSP block is shown in Figure 1-1. The DSP operates at 2.0 MHz, twice the frequency of the

ΣΔ converters. The two interleaved bit streams from the ΣΔ converters are processed simultaneously within the DSP.

Each MMA690xQ device is factory programmed to select the acceleration range. Filter characteristics for the X- and Y-axes

are customer programmed.

2.12.1

LOW-PASS FILTER

Low-pass filtering occurs in two stages. The serial data stream produced by the

ΣΔ converters is decimated and converted to

parallel values by a sinc filter. Parallel data is then processed by an Infinite Impulse Response (IIR) low-pass filter.

rates require greater DSP activity, which in turn requires more supply current.

Response parameters for available low-pass filter are summarized in A.2.