iC-MA

ANGULAR HALL SENSOR / ENCODER

Rev B3, Page 17/18

VDD

iC-MA

GND

CFG1

NCLUP

NCLDN

NCLR

NERR

RESET

OUTPUT

DATA INPUT

P0

P0

Q0

Q0

CPU

CPU

CPD

CPD

NPL

NPL

TCU

TCU

TCD

TCD

MR

MR

P1

P1

Q1

Q1

P2

P2

74HCT193

74HCT193

Q2

Q2

P3

P3

Q3

Q3

CFG2

CFG3

NEN

Figure 17: iC-MA

with

binary

counter

74HC/HCT193

DIR-INC mode

In DIR-INC mode a change in angle for both directions

of rotation generates an output pulse for signal CLK

(pin A). Signal DIR (pin B) gives the direction of ro-

tation. This mode permits the operation of external

binary counter modules (such as 74HC/HCT191, for

example), with signal NCLR (pin C) being used to re-

set the external counter. With a rising edge at CLK the

counter status is counted up or down, depending on

the value of the DIR signal. A low at DIR triggers a

countup; a high causes the setup to count down. Fig-

ure 17 shows a countup sequence followed by a count-

down sequence, both across the zero position.

Time [us]

CLK

DIR

NCLR

Figure 18: DIR-INC mode

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