iC-MFP

8-FOLD FAIL-SAFE P-FET DRIVER

Rev A2, Page 3/13

PACKAGES QFN24 4 mm x 4 mm to JEDEC

PIN CONFIGURATION QFN24

(top view)

PIN FUNCTIONS

No. Name

Function

1 NOUT1 Output channel 1

2 VB

Supply Voltage

3 VBR

Supply Voltage (R)

4 EN5

Enable input lo-level = VB-5V

5 EN10

Enable input lo-level = VB-10V

6 IN1

Input channel 1

7 IN2

Input channel 2

8 IN3

Input channel 3

9 IN4

Input channel 4

10 IN5

Input channel 5

11 IN6

Input channel 6

12 IN7

Input channel 7

13 IN8

Input channel 8

14 NOK

Output inverted status

15 ENFS

Enable input full scale lo-level = GND

16 GNDR

Ground (R)

17 GND

Ground

18 NOUT8 Output channel 8

19 NOUT7 Output channel 7

20 NOUT6 Output channel 6

21 NOUT5 Output channel 5

22 NOUT4 Output channel 4

23 NOUT3 Output channel 3

24 NOUT2 Output channel 2

TP

Thermal-Pad

The Thermal Pad is to be connected to a ground plane on the PCB. Connections between GND, GNDR

and the ground plane should be conciled to system FMEA aspects.