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Doc. # 20480086.003

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Global Call Progress Tone Detector

6

MX613

Preliminary Information

Application Information ......

Decoder Timing

Figure 4 - Data-Read Timing

Decoder Timing Characteristics

With reference to Figure 4,

Data-Read Timing.

Characteristics

Min.

Typ.

Max.

Unit

t

PWH

Serial Clock “High” Pulse Width

250

-

-

ns

t

PWL

Serial Clock “Low” Pulse Width

250

-

-

ns

t

CYC

Serial Clock-Cycle Time

600

-

-

ns

t

CSE

Chip Select Low to Clock “High” Edge

450

-

-

ns

t

CSH

Last Clock “High” Edge to CS “High”

600

-

-

ns

t

DH

Data Out Hold Time

0

-

-

ns

t

CDS

Clock Edge to Data Out Set Time

-

-

200

ns

t

IR

Interrupt (IRQ) Reset Time

-

-

200

ns

t

DE

Chip Select “Low” to Data Enable

-

-

200

ns

t

HIZ

Chip Select “High” to Output Tri-State

-

-

1000

ns

Notes

1 Data is output bit 5 first. Bit 5 can be clocked into the µProcessor by the first Serial Clock rising edge.

If 8 Serial Clock pulses are employed the last 2 data-bits will be “0” and should be ignored by the software.

2 Chip Select should be used to react to Interrupts and then returned to a logic “1”.

If Chip Select stays low there will be no further Interrupts and no Data Output update.

CHIP SELECT

SERIAL CLOCK

DATA OUT

BIT 5

BIT 4

BIT 0

TRI-STATE

t

CSE

t

DE

t

CDS

t

HIZ

t

PWL

t

PWH

t

DH

t

IR

t

CSH

t

CYC

IRQ