4

Application Information

XTAL

XTAL/CLOCK

ClkDivA

ClkDivB

RxDCacq

PLLacq

Doc1

Doc2

BT

Tx OUT

Tx ENABLE

Tx PS

Tx DATA

Rx DATA

Rx CLOCK

Tx CLOCK

Rx S/N

V

DD

V

DD

V

SS

V

BIAS

Rx PS

Rx FEEDBACK

Rx SIGNAL IN

Rx HOLD

XTAL

XTAL/CLOCK

1

2

V

SS

1

2

3

4

5

6

7

8

9

10

11

12

FX489P

24

23

22

21

20

19

18

17

16

15

14

13

C

4

100nF

±20%

C

5

1.0µF

±20%

C

6

22.0pF

±20%

C

7

15.0nF

±20%

C

8

15.0nF

±20%

X

1

Note 3

External Components

Component

Value

Tolerance

R

1

Note 1

±5%

R

2

1.0M

Ω

±10%

R

3

Note 2

±10%

R

4

100k

Ω

±10%

C

1

Note 1

±10%

C

2

33.0pF

±20%

C

3

33.0pF

±20%

Fig.2 External Components

Notes

1. The RC network formed by R

is required

between the Tx Out pin and the input to the modulator.

This network, which can form part of any d.c. level

shifting and gain adjustment circuitry, forms an

important part of the transmit signal filtering. The ground

connection to the capacitor C

give maximum attenuation of high-frequency noise into

the modulator.

The component values should be chosen so that the

product of the resistance (Ohms) and the capacitance

(Farads) is:

BT of 0.3 = 0.34/bit rate (bits/second)

BT of 0.5 = 0.22/bit rate (bits/second)

- with suitable values for common bit rates being:

R

1

C

1

8000 bits/sec

BT = 0.3

91.0k

Ω

470pF

4800 bits/sec

BT = 0.5

100k

Ω

470pF

9600 bits/sec

BT = 0.5

47.0k

Ω

470pF

NOTE that in all cases, the value of R

less than 47.0k

Ω and the calculated value of C

calculated parasitic (circuit) capacitances.

2. R

signal.

R

level.

3. The FX489 can operate correctly with Xtal/Clock

frequencies as detailed in Table 1.

Operation of this device without a Xtal or Clock input

may cause device damage.