I/O Data line +

I/O Data line -

Ground

PJDLLLC05

Low Capacitance TVS Diode Array

SPECIFICATION FEATURES

APPLICATIONS

This diode array is configured to protect up to two high speed data

transmission lines, used in Low Voltage Differential Signal (LVDS) ports.

Acting as a line terminator, minimizes overshoot and undershoot conditions

due to bus impedance, as well as protect against over-voltage events as

electrostatic discharges. The line-line concept minimizes the problems to

customers to re-route PCB lines, simplifying the design.

Maximum Capacitance of 1.2pF at 0Vdc 1MHz Line-to-Ground

Industry Standard SMT Package SOT563

Maximum Leakage Current of 1.0µA @ VRWM

USB 2.0 and Firewire Port Protection

HDMI Version 1.3

7/23/2009

Page 1

www.panjit.com

DVI

IEC61000-4-2 Full Compliance; 15kV Air, 8kV Contact*

100% Tin Matte finish (LEAD-FREE PRODUCT)

Gnd

Line1

Line2

Line1

Line2

SOT563 Package

1

2

3

4

6

5

Line-line concept ease the PCB design, directly placing the device over

the data lines, opening only the contact points. VREF is fixed by the

operating voltage, referenced to the ground.

Note: pins 1and 6 (Line1), pins 3 and 4 (

Line2) and pins 2 and 5 (Gnd) must be

connected externally, as the drawing

attached below.

12

3

4

5

6

4

1

2

3

6

5

Gnd

MAXIMUM RATINGS

Rating

Symbol

Value

Units

Peak Pulse Power (8/20µs Waveform)

Peak Pulse Current (8/20µs Waveform)

Operating Junction Temperature Range

Storage Temperature Range

Soldering Temperature, t max = 10s

50

W

A

6

°C

-55 to +125

°C

-55 to +150

°C

260

P

I

T

T

T

PPM

L

PP

stg

Tj = 25°C Unless otherwise noted

J

MARKING : 05